1. Field of the Invention
The present invention relates generally to integrated circuit devices, and more particularly, to a CMOS off-chip driver circuit with reduced signal swing, reduced power supply disturbance and no body effect.
2. Description of the Prior Art
Multi-chip packaging technology is desirable for realizing high performance and highly integrated systems. In this technology, a substrate that provides chip-to-chip wiring offers shorter interconnection lengths and reduced parasitics compared to single-chip module packages. Chip-to-chip interconnection delay, which often limits system performance, can then be minimized. On the other hand, the number of off-chip drivers (OCDs) increases with increasing the level of integration. Therefore, the noise generated by these drivers becomes a crucial concern especially when many of them switch simultaneously. This noise is known as a simultaneous switching noise (di/dt noise) and results from rapid current change across a parasitic inductance of the power supply bus. This noise can create a false signal and cause spurious switching.
The delay associated with sending signals from chip-to-chip is the longest delay in computers and other devices that require chip-to-chip interconnection. Some of this delay is inherent to the transmission line including effects such as signal reflection (also called ringing). An off-chip driver is used to minimize this delay by generating a large current very quickly to charge the transmission line very rapidly to a new state. However, by doing so, the rate of change of current with respect to time (di/dt) is very high. With multi-chip packaging technology, there are a large number of off-chip drivers switching simultaneously. This results in a large simultaneous switching noise (Ldi/dt), where L is the parasitic inductance of the power bus. An off-chip driver which resides on the noisy supplies of a sending chip can transmit this noise into a signal line feeding an off-chip receiver (OCR), causing a false signal and spurious switching. Thus, there is a need to develop an OCD with reduced simultaneous switching noise.
In addition, simultaneous switching noise, (Ldi/dt), results in a relative collapse of the power supply and causes performance degradation because the circuits are operating transiently at a lower supply voltage than intended. The value of the inductance, L, has restrictions and is set by chip packaging. In order to minimize the power supply collapse, it is desirable to reduce the simultaneous switching noise. Thus, there is a further need to develop an OCD with reduced simultaneous switching noise.
Another cause of the delay in sending signals from chip-to-chip is due to transmission line reflection. Signal reflection is an important issue in the design of a signal driver, especially in the case of very high frequency signal transmission using longer interconnection lines. In a conventional full swing driver/receiver design, excessive transmission line ringing occurs because the output impedance of the OCD is not matched to the transmission line characteristic impedance. If this extraneous ringing crosses the threshold of an off-chip receiver (OCR), double switching may occur. For this reason a delay adder must be used to allow an adequate settling time before a receiver level is assumed valid. The settling time is dependent on both the net length and loading configuration. Thus, there is a need to develop an OCD with an output impedance that matches the transmission line characteristic impedance.
Another problem related to circuits which use an n-channel over p-channel totem pole configuration wherein the output is taken from the common source node is the body effect. The source to substrate voltage varies and therefore, the threshold changes with output voltage, thereby degrading the performance of such a circuit arrangement. Thus, there is a need to develop an n-channel over p-channel circuit which eliminates the body effect.